The present invention generally relates to a method and device for inspecting a plurality of semiconductor chip integrated circuits formed on a semiconductor wafer.
Recently, miniaturization of an electronic unit incorporating a semiconductor IC circuit device (hereinafter referred to as xe2x80x9ca semiconductor devicexe2x80x9d, when applicable) has been markedly advanced with reduction of the manufacturing cost thereof. Hence, there has been a strong demand for miniaturization of semiconductor device which is a main element in an electronic unit and for a reduction in the manufacturing cost thereof.
In general, in the step of installation in the manufacturing of a semiconductor device, a semiconductor chip is mounted on the die pad of a lead frame, and then the semiconductor chip is electrically connected to the lead frame with bonding wires. Thereafter, the semiconductor chip and the lead frame are sealed with resin or ceramics, and then mounted on a printed circuit board.
A sealing material such as resin or ceramics does not directly affect electrical circuit characteristics. Hence, in order to reduce the size and weight of an electronic unit, a method has been developed in which a semiconductor chip which is obtained by cutting a semiconductor wafer and is not sealed is directly mounted, as a semiconductor device, on a circuit board. In this methods it is essential that the semiconductor chip is guaranteed in quality.
In general, for guarantee in quality of a semiconductor device, before a delivery inspection is given to the semiconductor device, a burn-in test is carried out in which stress is applied to a semiconductor device to make its latent defect tangible, thereby to remove a semiconductor device which may become out of order. Heretofore, the following method is generally employed: After being sealed with resin or ceramics, semiconductor chips are mounted on a burn-in board having a plurality of sockets. Under this condition, a voltage is applied to the semiconductor devices which is higher than a voltage which is usually applied thereto, so that the semiconductor devices are operated at high temperature; that is, stress is applied to the semiconductor device.
In the case where it is required to give the burn-in test to semiconductor chips which are not sealed, the latter are mounted on a current applying substrate for reliability guarantee by using a semiconductor chip sockets. However, the semiconductor chip sockets are expensive, and the handling of the semiconductor chips are rather troublesome which are not sealed yet. This means that the test requires a relatively long time. In order to overcome this difficulty, a method has been developed in which, when the semiconductor chips are in the form of a semiconductor wafer, they are collectively subject to the burn-in test.
In an inspection by the burn-in test of this type, probe needles are electrically connected to a plurality of semiconductor chips formed on a single semiconductor waferxe2x80x94for instance the probe needles are mounted on the semiconductor chipsxe2x80x94under this condition, a supply voltage or signal is applied to the probe needles to operate the plurality of the semiconductor chips. Therefore, it is necessary to provide a probe card having a large number of probe needles, and the probe card is expensive. For instance, several probe needles to several tens of probe needle are required per device. Since each wafer has more than several hundred devices, it is necessary to provide a probe card having more than one thousand probe needles. In practice, it is considerably difficult to manufacture such a probe card.
In order to overcome this difficulty, a contactor which is a thin probe card, has been proposed in the art. The contactor comprises a flexible substrate having bump electrodes (cf. xe2x80x9cNitto Technical Reportxe2x80x9d, vol. 28, No. 2 (October 1990, pp. 57-62).
A burn-in test using the aforementioned contactor will be described.
FIG. 12 is a fragmentary sectional view for a description of a probing operation using the contactor. In FIG. 12, reference numeral 1 designates a card type contactor; 2, a polyimide substrate; 3, a wiring layer formed on the polyimide substrate; 4, probe terminals, namely, bump electrodes; 5, through-holes through which the wiring layer 3 is connected to the bump electrodes 4; 6, a semiconductor wafer; and 7, pad electrodes.
As shown in FIG. 12, the contactor 1 is pressed against the semiconductor wafer 6 (to which a burn-in test is to be given) on a substrate to be measured, so that the pad electrodes 7 (or inspecting electrodes) of the semiconductor wafer 6 are positively connected to the bump electrodes 4 of the contactor 1. Under this condition, supply voltage or signal is applied through the wiring layer 3, to inspect the semiconductor wafer 6.
Heretofore, the positioning of the wafer and the contactor is carried out by using a reference position provided on the contactor and several alignment marks on the wafer. However, this positioning method is disadvantageous as follows: It is impossible to visually accurately detect whether or not the bump electrodes of the contactor are in alignment with the pad electrodes on the semiconductor wafer; that is, it is difficult to align the bump electrodes with the pad electrodes with high accuracy. In addition, after the alignment of the electrodes, the wafer and the contactor may be shifted from each other, for instance, by vibration.
In the prior art, in the burn-in test carried out at a high temperature (for instance 125xc2x0 C.), it is necessary to maintain the semiconductor wafer at high temperature. When the semiconductor wafer is heated from room temperature (for instance 25xc2x0 C.) to the high temperature (125xc2x0 C.), the semiconductor wafer is expanded, and at the same time the contactor (made of a polyimide substrate) is also expanded. The thermal expansion coefficient of the silicon which is the material of the semiconductor wafer, is 3.5xc3x9710xe2x88x926/xc2x0 C., and the thermal expansion coefficient of the polyimide which the material of the contactor, is 16xc3x9710xe2x88x926/xc2x0 C. Hence, when the temperature is increased from room temperature (25xc2x0 C.) to the high temperature (125xc2x0 C.), a 8-inch semiconductor wafer (20.2 cm in diameter) is expanded 70 microns, while the contactor (polyimide substrate) is expanded 320 microns.
The size of the pad electrodes on the semiconductor wafer is 50 to 100 microns. Hence, because of the difference in expansion between the semiconductor wafer and the polyimide substrate, in the peripheral portion of the semiconductor wafer the pad electrodes are not electrically connected to the bump electrodes.
In other words, even if the pad electrodes of the semiconductor wafer are electrical in contact with the bump electrodes of the contactor at room temperature, as the temperature is increased, the following problem takes place: Because of the difference in thermal expansion coefficient between the semiconductor wafer and the contactor, in the peripheral portion of the semiconductor wafer the pad electrodes of the semiconductor wafer are shifted from the bump electrodes; that is, the former electrodes are not electrically connected to the latter electrodes.
An object of the invention is to eliminate the above-described difficulties accompanying the prior art. More specifically, an object of the invention is to provide a contactor and a semiconductor device inspecting method in which the bump electrodes of the contactor are accurately in alignment with the pad electrodes on a semiconductor wafer, and in which it is visually detect whether or not the bump electrodes of the contactor are connected to the pad electrodes on the semiconductor wafer, and those electrodes are prevented from being shifted by external causes.
Another object of the invention is provide a contactor and a semiconductor device inspecting method in which, even at high temperature, in the peripheral portion of a semiconductor wafer the pad electrodes of the latter are never shifted from the bump electrodes of the contactor; that is, the former electrodes are positively electrically connected to the latter electrodes.
The foregoing objects of the invention have been achieved by the provision of the following means:
A contactor according to an aspect of the invention comprise: a plurality of recesses which are substantially equal in size to semiconductor chips; side walls provided respectively around the recesses; and a plurality of bump electrodes formed in the recesses in correspondence to a plurality of pad electrodes formed on the semiconductor chips.
With the above-described means, the side walls are engaged with grooves which are formed when a semiconductor wafer is cut to form a plurality of semiconductor chips. That is, since the semiconductor chips are fitted in the recesses which are equal in size to the semiconductor chips, the positions of the pad electrodes on the semiconductor chips and those of the bump electrodes are automatically determined.
A contactor according to another aspect of the invention comprises: a plurality of recesses which are substantially equal in size to semiconductor chips; side walls provided respectively around the recesses; a plurality of bump electrodes formed in the recesses in correspondence to a plurality of pad electrodes formed on the semiconductor chips; a substrate to which a plurality of semiconductor chips are secured through an expandable dicing sheet; and means for press-fitting the semiconductor chips on the substrate into the recesses.
With the side walls engaged with the grooves, the semiconductor chips are fitted in the recesses, and the semiconductor chips are secured to the substrate through the dicing sheet. Under this condition, the semiconductor chips are press-fitted in the recesses, so that the bump electrodes of the contactor are positively connected to the pad electrodes of the semiconductor chips.
Furthermore, with the contactor, the side walls formed around the recesses are trapezoid in section.
Therefore, the width of the end of each of the side walls is smaller than the width of each of the grooves. This feature makes it possible to engage the side walls with the grooves with ease.
Moreover, according to the invention, the semiconductor wafer is secured to the expandable dicing sheet, and then cut into the semiconductor chips, and the side walls are engaged with the grooves which are formed when the semiconductor wafer is cut in the above-described manner. Hence, the bump electrodes in the recesses are in alignment with the pad electrodes of the semiconductor chips; that is; the former electrodes are electrically connected to the latter electrodes. Hence, even when the contactor is thermally expanded by the high temperature during the burn-in test, the semiconductor chips fitted in the recesses are moved according to the expansion of the contact with the aid of the expandable dicing sheet. Therefore, the bump electrode will never be shifted from the pad electrodes.
A delivery inspection is given to the semiconductor chips to which the burn-in test has been given. Therefore, only acceptable semiconductor chips are shipped out of the factory at all times.
Furthermore, the following method may be employed: That is, it is determined whether or not semiconductor chips are acceptable. If a semiconductor chip or chips which have been determined unacceptable, those chips are eliminated. Under this condition, the burn-in test is carried out. This will prevent the flow of abnormal current to the contactor which is due to the unacceptable semiconductor chip or chips. Hence, the contactor can be protected, and, in the burn-in test, stable voltage or current may be supplied.